S. Windh received a Ph.D. in computer science from the University of California (Riverside, California, USA) in 2018. He was a Research Assistant at the Embedded Systems Lab during his studies.
He is currently an MTS Systems Software Engineering in the TPG Storage and Memory Systems Pathfinding group at Micron Technology, Inc. (Richardson, Texas USA). His research interests include multithreading and parallelism, reconfigurable-computing architectures and tools, and high-performance computing and applications. 
He co-led the Software Architecture for Micron's Memory Lake investigation with Pacific Northwest National Labs exploring disaggregated shared memory with near memory compute capabilities. He is currently leading a project exploring emulating High IOPS storage drives for AI workloads and extending Nvidia’s Dynamo to support CXL shared memory.

Jacob Schmier is a Senior Technologist in Firmware Engineering at Sandisk, developing enterprise SSD firmware for next‑generation platforms. His work centers on implementation and technical leadership driving performance, reliability, and efficiency in data‑center storage.

Stephen Bates is an Fellow in the AI Business Unit at AMD, where he leads work on communication and storage architectures and associated software for AI and data-centric systems. He is a recognized expert in high-performance technologies including NVMe, RDMA, TCP/IP, and non-volatile memory, with deep experience developing complex storage and communication solutions such as NVMe controllers and PCIe switching fabrics.
Stephen thrives at the intersection of hardware and software, bridging architectural innovation with practical implementation. He is an active contributor to the Linux kernel and other open-source projects that advance system performance and scalability.
Prior to AMD, Stephen served as Assistant Professor of Computer Engineering at the University of Alberta. He holds a PhD from the University of Edinburgh and is a Senior Member of the IEEE.

Jeff Bromberger is an engineer on the Storage Core team at Microsoft. Prior to joining Microsoft in 2023, he was co-owner of Kernel Drivers and worked as a Windows driver consultant for over 20 years.

Satananda Burla is a Distinguished Engineer at Marvell, involved in the design and development of Marvell Octeon SoC architecture. He is also involved in the design and development of Networking, Memory/Storage, and Security solutions involving multiple Marvell product lines. He represents Marvell at OPI, OASIS, IBTA, UEC, and other technical forums.

Abhishek Gupta is a Storage Architect at Cerebras Systems, where he designs next-generation storage infrastructure for large-scale AI training and inference workloads. He brings over 15 years of experience building distributed storage systems, file systems, and high-performance I/O stacks. Previously, he worked as Senior Staff at Huawei's Research Centre, with earlier principal and senior engineering roles at Dell EMC (Isilon OneFS, Data Domain), DDN, NetApp, and Veritas. His work spans GPU Direct Storage, File-over-Memory, CXL, computational storage, and distributed file systems.

Trent Johnson is a Hardware Architect at IBM, with a focus on the IBM FlashCore Module (Solid State Drive). He joined IBM as part of the Cleversafe Acquisition where he was the System Hardware Architect of exabyte-scale Object Storage. Prior to Cleversafe, he developed system-level manufacturing and test solutions for AMD CPUs and GPUs where he was awarded the AMD Corporate Technical Achievement Award. 
He has 27 years of industry experience, holds 7 US patents and has published at the Future of Memory and Storage, SNIA Developer Conference, Burn-in and Test Socket Workshop as well as the Conference for Consumer Electronics. He earned BSEE and MSEE degrees from The University of Texas at Austin in Electrical Engineering with a focus on Manufacturing System Engineering.

Keith MacLean is a Member of Technical Staff and System Architect at Micron Technology, where he focuses on enterprise SSD architecture, power efficiency, and next-generation storage platform design.

Chris J. Newburn, who goes by CJ, is a Distinguished Engineer who drives HPC strategy and the technical IO roadmap in NVIDIA GPU Cloud, focused on pushing the envelope for storage and networking programming models at scale, data center architecture and security, and scaled systems.

He is a community builder with a passion for building an ecosystem that extends the core capabilities of hardware and software platforms from HPC into AI, data science, and visualization. He co-leads the Storage-Next effort to optimize products for IOPs/TCO.

He tinkers with and leverages NVIDIA and vendor products in a lab packed with scaled compute, storage and networking gear to apply and extend new tech. He's delighted to have worked on volume products that his Mom used and that help researchers do their life's work in science that previously wasn't possible.

Lisa Rivalin is a Systems Engineer on the Hardware Design team at Meta, where she has worked for six years. She applies data and AI methods to hardware engineering challenges. 

Currently, Lisa leads efforts to estimate and reduce the carbon footprint of Meta IT hardware inventory, and evaluates new server technologies to propose lower-impact designs. 

Previously at Meta, she led a digital twin initiative that combined physics-based modeling and machine learning to optimize data center design and operations.

Before Meta, Lisa was a research scientist at Engie, developing energy performance contracts and smart building technologies, and an affiliate research scientist at Lawrence Berkeley National Laboratory. She holds a PhD in Applied Statistics and Energy from Mines ParisTech, an MSc in Engineering from the University of Poitiers, and an MA in History and Philosophy of Science from Paris Diderot University.

Inho Song is a Ph.D. student in Computer Science at Virginia Tech. His research focuses on storage systems, with an emphasis on emerging SSD interfaces and architectures such as NVMe Flexible Data Placement (FDP) and Zoned Namespace (ZNS) SSDs. His work combines empirical characterization, systems design, and emulation to better understand device behavior and improve the interaction between storage hardware and software.

Himabindu Tummala is a Distinguished Engineer based in Hopkinton, Massachusetts, with deep expertise in large‑scale storage systems and distributed data architectures. Her work focuses on building AI‑ready data platforms, spanning data preparation and object‑based infrastructures that support modern analytics and AI workloads.