JEDEC
JEDEC develops open standards, which are the basic building blocks of the digital economy and form the bedrock on which healthy, high-volume markets are built. JEDEC's technical committees and task groups focus on a broad range of technologies from memory to wide bandgap semiconductors, quality & reliability, and packaging, to name just a few.
The goal of the alliance is to provide opportunities for engagement between JEDEC and SNIA technical working groups. JEDEC adopted the EDSFF specifications from the SNIA SFF TWG for their CXL Memory Module Base Specification. JEDEC also develops SSD specifications in its JC-64.8 committee. The alliance provides an open dialogue between the two organizations to manage changes and provide feedback between both organizations.
Current JEDEC areas of focus span a wide range of technologies, including main memory such as DDR SDRAM and HBM; flash and storage technologies including UFS, e.MMC, SSD, and XFMD; and mobile memory such as LPDDR. JEDEC also maintains standards for memory module design files, configurations (JESD21-C), registered outlines (JEP95), and PartModel guidelines (JEP30), along with work in lead-free manufacturing, electrostatic discharge (ESD), and wide bandgap power semiconductors.
JEDEC and SNIA are currently working together to facilitate alignment related to CXL Memory Modules and the EDSFF family of specifications.
